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2N6790
Data Sheet December 2001
3.5A, 200V, 0.800 Ohm, N-Channel Power MOSFET
The 2N6790 is an N-Channel enhancement mode silicon gate power MOS field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This device can be operated directly from an integrated circuit.
Features
* 3.5A, 200V * rDS(ON) = 0.800 * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device
Ordering Information
PART NUMBER 2N6790 PACKAGE TO-205AF BRAND 2N6790
* Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
NOTE: When ordering, include the entire part number.
Symbol
D
G
S
Packaging
JEDEC TO-205AF
DRAIN (CASE)
SOURCE
GATE
(c)2001 Fairchild Semiconductor Corporation
2N6790 Rev. B
2N6790
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified 2N6790 200 200 3.5 2.25 14 20 3.5 14 20 0.16 -55 to 150 300 260 UNITS V V A A A V A A W W/oC oC
oC oC
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulse Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Above TC = 25oC, Derate Linearly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS IGSS VDS(ON) rDS(ON) VSD gfs CISS COSS CRSS td(ON) tr td(OFF) tf SOA VDS = 160V, ID = 125mA VDS = 5.7V, ID = 3.5A ID = 2.25A VGS 74V, RG = 50 TEST CONDITIONS ID = 0.25mA, VGS = 0V VGS = VDS, ID = 1.0mA VDS = 200V, VGS = 0V VDS = 160V, VGS = 0V TC = 125oC VGS = 20V, VDS = 0 ID = 3.5A, VGS = 10V ID = 2.25A, VGS = 10V ID = 2.25A, VGS = 10V TC = 125oC IS = 3.5A, VGS = 0V ID = 2.25A, VDS = 5V VGS = 0V, VDS = 25V f = 1MHz MIN 200 2 0.7 1.5 200 60 15 20 20 Free Air Operation TYP .5 2.25 450 150 40 MAX 4 250 1000 100 2.8 0.800 1.5 1.5 4.5 600 300 80 40 50 50 50 6.25 175 UNITS V V A A nA V V S pF pF pF ns ns ns ns W W
oC/W oC/W
Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero-Gate Voltage Drain Current
Gate to Source Leakage Current Drain to Source On-Voltage (Note 2) Drain to Source On Resistance
Diode Forward Voltage Forward Transconductance (Note 2) Input Capacitance Output Capacitance Reverse-Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Safe Operating Area
Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient
RJC RJA
Source to Drain Diode Specifications
PARAMETER Reverse Recovery Time Reverse Recovered Charge NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). SYMBOL trr QRR TEST CONDITIONS TJ = 150oC, ISD = 3.5A, dlSD/dt = 100A/s TJ = 150oC, ISD = 3.5A, dlSD/dt = 100A/s MIN TYP 350 2.3 MAX UNITS ns C
(c)2001 Fairchild Semiconductor Corporation
2N6790 Rev. B
2N6790 Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 ID, DRAIN CURRENT (A)
Unless Otherwise Specified
5
4
3
0.6 0.4
2
0.2 0 0 25 50 75 100 TC , CASE TEMPERATURE (oC) 125 150
1
0 25
50
75
100
125
150
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
2 1.0 ZJC, NORMALIZED THERMAL IMPEDANCE 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 10-5 SINGLE PULSE 10-4
PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x ZJC x RJC + TC 0.1 10-2 10-3 T1, RECTANGULAR PULSE DURATION (s) 1 10
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
50 OPERATION IN THIS AREA LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) 10 10s 100s 1.0ms 1 10ms TC = 25oC 0.1 TJ = MAX RATED SINGLE PULSE 0.05 1 10 100 VDS, DRAIN TO SOURCE (V) 100ms DC 0 1000 0 ID, DRAIN CURRENT (A) 12
10V
8V 80s PULSE TEST
7V 8 VGS = 6V 4 5V 4V 25 50 75 VDS, DRAIN TO SOURCE VOLTAGE (V) 100
FIGURE 4. FORWARD BIAS SAFE OPERATING AREAS
FIGURE 5. OUTPUT CHARACTERISTICS
(c)2001 Fairchild Semiconductor Corporation
2N6790 Rev. B
2N6790 Typical Performance Curves
12 ID(ON), ON-STATE DRAIN CURRENT (A) 80s PULSE TEST 10V 9V 8V VGS = 7V
Unless Otherwise Specified (Continued)
16 VDS > ID(ON) x rDS(ON) MAX 80s PULSE TEST 12 -55oC
25oC
ID, DRAIN CURRENT (A)
8
125oC 8
6V 4 5V
4
4V 0 0 2 4 6 8 VDS, DRAIN TO SOURCE VOLTAGE (V) 10
0
2 4 6 VGS, GATE TO SOURCE VOLTAGE (V)
8
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
1.5 rDS(ON), DRAIN TO SOURCE ON RESISTANCE ()
NORMALIZED ON RESISTANCE
PULSE DURATION = 2.0s INITIAL TJ = 25oC VGS = 10V
2.2 ID = 2A VGS = 10V 1.8
1.0
1.4
VGS = 20V 0.5
1.0
0.6
0 0 5 10 ID, DRAIN CURRENT (A) 15 20
0.2 -40 0 40 80 120 150 TJ, JUNCTION TEMPERATURE (oC)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE
1000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS = CDS + CGD
1.15 C, CAPACITANCE (pF)
800
1.05
600 CISS
0.95
400
0.85
200 COSS CRSS 0 10 20 30 40 VDS, DRAIN TO SOURCE VOLTAGE (V) 50
0.75
0 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
(c)2001 Fairchild Semiconductor Corporation
2N6790 Rev. B
2N6790 Typical Performance Curves
5.0 80s PULSE TEST gfs, TRANSCONDUCTANCE (S) 4.25 3.75 3.0 2.25 1.50 0.75 0 0 2 4 6 8 10 ID, DRAIN CURRENT (A) 12 14 TJ = 25oC TJ = 125oC
Unless Otherwise Specified (Continued)
IDR, REVERSE DRAIN CURRENT (A)
TJ = -55oC
102 TJ = 25oC TJ = 150oC
10
TJ = 150oC TJ = 25oC 1 0 1 2 3 VSD, SOURCE TO DRAIN VOLTAGE (V) 4
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20 VGS, GATE TO SOURCE VOLTAGE (V) ID = 7A VDS = 160V VDS = 100V VDS = 40V
15
10
5
0 0 4 8 12 16 20 Qg, TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
(c)2001 Fairchild Semiconductor Corporation
2N6790 Rev. B
2N6790 Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD
+
0V
IAS 0.01
0 tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr RL VDS
+
tOFF td(OFF) tf 90%
90%
RG DUT
-
VDD 0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS
12V BATTERY
0.2F
50k 0.3F
G
DUT 0
IG(REF) 0 IG CURRENT SAMPLING RESISTOR
S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
(c)2001 Fairchild Semiconductor Corporation
2N6790 Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4

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